DSC POWER 864 - REV2 Especificaciones

© 2009 Microchip Technology Inc. Preliminary DS39927BPIC24F16KA102 FamilyData Sheet20/28-Pin General Purpose,16-Bit Flash Microcontrollerswith nanoWat

PIC24F16KA102 FAMILYDS39927B-page 8 Preliminary © 2009 Microchip Technology Inc.The internal oscillator block also provides a stablereference source f

PIC24F16KA102 FAMILYDS39927B-page 98 Preliminary © 2009 Microchip Technology Inc.The following code sequence for a clock switch isrecommended:1. Disab

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 99PIC24F16KA102 FAMILYREGISTER 9-4: REFOCON: REFERENCE OSCILLATOR CONTROL REGISTERR/W-0 U-

PIC24F16KA102 FAMILYDS39927B-page 100 Preliminary © 2009 Microchip Technology Inc.NOTES:

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 101PIC24F16KA102 FAMILY10.0 POWER-SAVING FEATURESThe PIC24F16KA102 family of devices provid

PIC24F16KA102 FAMILYDS39927B-page 102 Preliminary © 2009 Microchip Technology Inc.10.2.2 IDLE MODEIdle mode has these features:• The CPU will stop exe

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 103PIC24F16KA102 FAMILYExiting Deep Sleep mode generally does not retain thestate of the de

PIC24F16KA102 FAMILYDS39927B-page 104 Preliminary © 2009 Microchip Technology Inc.10.2.4.5 Deep Sleep WDTTo enable the DSWDT in Deep Sleep mode, progr

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 105PIC24F16KA102 FAMILYREGISTER 10-1: DSCON: DEEP SLEEP CONTROL REGISTER(1)R/W-0 U-0 U-0 U-

PIC24F16KA102 FAMILYDS39927B-page 106 Preliminary © 2009 Microchip Technology Inc.REGISTER 10-2: DSWSRC: DEEP SLEEP WAKE-UP SOURCE REGISTER(1)U-0 U-0

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 107PIC24F16KA102 FAMILY10.3 Doze ModeGenerally, changing clock speed and invoking one ofthe

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 9PIC24F16KA102 FAMILYTABLE 1-1: DEVICE FEATURES FOR THE PIC24F16KA102 FAMILYFeatures PIC24F

PIC24F16KA102 FAMILYDS39927B-page 108 Preliminary © 2009 Microchip Technology Inc.NOTES:

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 109PIC24F16KA102 FAMILY11.0 I/O PORTSAll of the device pins (except VDD and VSS) are shared

PIC24F16KA102 FAMILYDS39927B-page 110 Preliminary © 2009 Microchip Technology Inc.11.1.1 OPEN-DRAIN CONFIGURATIONIn addition to the PORT, LAT and TRIS

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 111PIC24F16KA102 FAMILY12.0 TIMER1 The Timer1 module is a 16-bit timer which can serve asth

PIC24F16KA102 FAMILYDS39927B-page 112 Preliminary © 2009 Microchip Technology Inc.REGISTER 12-1: T1CON: TIMER1 CONTROL REGISTERR/W-0 U-0 R/W-0 U-0 U-0

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 113PIC24F16KA102 FAMILY13.0 TIMER2/3The Timer2/3 module is a 32-bit timer, which can also b

PIC24F16KA102 FAMILYDS39927B-page 114 Preliminary © 2009 Microchip Technology Inc.FIGURE 13-1: TIMER2/3 (32-BIT) BLOCK DIAGRAMTMR3 TMR2Set T3IF EqualC

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 115PIC24F16KA102 FAMILYFIGURE 13-2: TIMER2 (16-BIT SYNCHRONOUS) BLOCK DIAGRAM FIGURE 13-3:

PIC24F16KA102 FAMILYDS39927B-page 116 Preliminary © 2009 Microchip Technology Inc.REGISTER 13-1: T2CON: TIMER2 CONTROL REGISTERR/W-0 U-0 R/W-0 U-0 U-0

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 117PIC24F16KA102 FAMILYREGISTER 13-2: T3CON: TIMER3 CONTROL REGISTERR/W-0 U-0 R/W-0 U-0 U-0

PIC24F16KA102 FAMILYDS39927B-page 10 Preliminary © 2009 Microchip Technology Inc.FIGURE 1-1: PIC24F16KA102 FAMILY GENERAL BLOCK DIAGRAMInstructionDeco

PIC24F16KA102 FAMILYDS39927B-page 118 Preliminary © 2009 Microchip Technology Inc.NOTES:

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 119PIC24F16KA102 FAMILY14.0 INPUT CAPTUREThe input capture module is used to capture a time

PIC24F16KA102 FAMILYDS39927B-page 120 Preliminary © 2009 Microchip Technology Inc.14.1 Input Capture RegistersREGISTER 14-1: IC1CON: INPUT CAPTURE 1 C

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 121PIC24F16KA102 FAMILY15.0 OUTPUT COMPARE15.1 Setup for Single Output Pulse GenerationWhen

PIC24F16KA102 FAMILYDS39927B-page 122 Preliminary © 2009 Microchip Technology Inc.15.3 Pulse-Width Modulation (PWM) ModeThe following steps should be

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 123PIC24F16KA102 FAMILYEXAMPLE 15-1: PWM PERIOD AND DUTY CYCLE CALCULATIONS(1)TABLE 15-1: E

PIC24F16KA102 FAMILYDS39927B-page 124 Preliminary © 2009 Microchip Technology Inc.FIGURE 15-1: OUTPUT COMPARE MODULE BLOCK DIAGRAM ComparatorOutputLog

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 125PIC24F16KA102 FAMILY15.4 Output Compare RegisterREGISTER 15-1: OC1CON: OUTPUT COMPARE 1

PIC24F16KA102 FAMILYDS39927B-page 126 Preliminary © 2009 Microchip Technology Inc.REGISTER 15-2: PADCFG1: PAD CONFIGURATION CONTROL REGISTERU-0 U-0 U-

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 127PIC24F16KA102 FAMILY16.0 SERIAL PERIPHERAL INTERFACE (SPI)The Serial Peripheral Interfac

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 11PIC24F16KA102 FAMILYTABLE 1-2: PIC24F16KA102 FAMILY PINOUT DESCRIPTIONSFunctionPin Number

PIC24F16KA102 FAMILYDS39927B-page 128 Preliminary © 2009 Microchip Technology Inc.FIGURE 16-1: SPI1 MODULE BLOCK DIAGRAM (STANDARD BUFFER MODE) Intern

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 129PIC24F16KA102 FAMILYTo set up the SPI module for the Enhanced BufferMaster (EBM) mode of

PIC24F16KA102 FAMILYDS39927B-page 130 Preliminary © 2009 Microchip Technology Inc.REGISTER 16-1: SPI1STAT: SPI1 STATUS AND CONTROL REGISTERR/W-0 U-0 R

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 131PIC24F16KA102 FAMILYbit 1 SPITBF: SPI1 Transmit Buffer Full Status bit1 = Transmit not y

PIC24F16KA102 FAMILYDS39927B-page 132 Preliminary © 2009 Microchip Technology Inc.REGISTER 16-2: SPI1CON1: SPI1 CONTROL REGISTER 1U-0 U-0 U-0 R/W-0 R/

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 133PIC24F16KA102 FAMILYbit 1-0 PPRE<1:0>: Primary Prescale bits (Master mode)11 = Pri

PIC24F16KA102 FAMILYDS39927B-page 134 Preliminary © 2009 Microchip Technology Inc.EQUATION 16-1: RELATIONSHIP BETWEEN DEVICE AND SPI CLOCK SPEED(1)TAB

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 135PIC24F16KA102 FAMILY17.0 INTER-INTEGRATED CIRCUIT (I2C™)The Inter-Integrated Circuit (I2

PIC24F16KA102 FAMILYDS39927B-page 136 Preliminary © 2009 Microchip Technology Inc.FIGURE 17-1: I2C™ BLOCK DIAGRAM I2C1RCVInternalData BusSCL1SDA1Sh

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 137PIC24F16KA102 FAMILY17.3 Setting Baud Rate When Operating as a Bus MasterTo compute the

PIC24F16KA102 FAMILYDS39927B-page 12 Preliminary © 2009 Microchip Technology Inc.CN0 10 7 12 9 I STInterrupt-on-Change InputsCN1 9 6 11 8 I STCN2 2 19

PIC24F16KA102 FAMILYDS39927B-page 138 Preliminary © 2009 Microchip Technology Inc.REGISTER 17-1: I2C1CON: I2C1 CONTROL REGISTERR/W-0 U-0 R/W-0 R/W-1 H

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 139PIC24F16KA102 FAMILYbit 5 ACKDT: Acknowledge Data bit (when operating as I2C master; app

PIC24F16KA102 FAMILYDS39927B-page 140 Preliminary © 2009 Microchip Technology Inc.REGISTER 17-2: I2C1STAT: I2C1 STATUS REGISTERR-0, HSC R-0, HSC U-0 U

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 141PIC24F16KA102 FAMILYbit 3 S: Start bit 1 = Indicates that a Start (or Repeated Start) bi

PIC24F16KA102 FAMILYDS39927B-page 142 Preliminary © 2009 Microchip Technology Inc.REGISTER 17-3: I2C1MSK: I2C1 SLAVE MODE ADDRESS MASK REGISTERU-0 U-0

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 143PIC24F16KA102 FAMILY18.0 UNIVERSAL ASYNCHRONOUS RECEIVER TRANSMITTER (UART)The Universal

PIC24F16KA102 FAMILYDS39927B-page 144 Preliminary © 2009 Microchip Technology Inc.18.1 UART Baud Rate Generator (BRG)The UART module includes a dedica

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 145PIC24F16KA102 FAMILY18.2 Transmitting in 8-Bit Data Mode1. Set up the UART:a) Write appr

PIC24F16KA102 FAMILYDS39927B-page 146 Preliminary © 2009 Microchip Technology Inc.REGISTER 18-1: UxMODE: UARTx MODE REGISTERR/W-0 U-0 R/W-0 R/W-0 R/W-

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 147PIC24F16KA102 FAMILYbit 3 BRGH: High Baud Rate Enable bit1 = BRG generates 4 clocks per

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 13PIC24F16KA102 FAMILYPGC1 5 2 5 2 I/O ST In-Circuit Debugger and ICSP™ Programming ClockPG

PIC24F16KA102 FAMILYDS39927B-page 148 Preliminary © 2009 Microchip Technology Inc.REGISTER 18-2: UxSTA: UARTx STATUS AND CONTROL REGISTERR/W-0 R/W-0 R

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 149PIC24F16KA102 FAMILYbit 5 ADDEN: Address Character Detect bit (bit 8 of received data =

PIC24F16KA102 FAMILYDS39927B-page 150 Preliminary © 2009 Microchip Technology Inc.REGISTER 18-3: UxTXREG: UARTx TRANSMIT REGISTERU-x U-x U-x U-x U-x U

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 151PIC24F16KA102 FAMILY19.0 REAL-TIME CLOCK AND CALENDAR (RTCC) The RTCC provides the user

PIC24F16KA102 FAMILYDS39927B-page 152 Preliminary © 2009 Microchip Technology Inc.19.2 RTCC Module RegistersThe RTCC module registers are organized in

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 153PIC24F16KA102 FAMILY19.2.4 RTCC CONTROL REGISTERSREGISTER 19-1:RCFGCAL: RTCC CALIBRATION

PIC24F16KA102 FAMILYDS39927B-page 154 Preliminary © 2009 Microchip Technology Inc.bit 7-0 CAL<7:0>: RTC Drift Calibration bits01111111 = Maximum

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 155PIC24F16KA102 FAMILYREGISTER 19-3: ALCFGRPT: ALARM CONFIGURATION REGISTERR/W-0 R/W-0 R/W

PIC24F16KA102 FAMILYDS39927B-page 156 Preliminary © 2009 Microchip Technology Inc.19.2.5 RTCVAL REGISTER MAPPINGSREGISTER 19-4: YEAR: YEAR VALUE REGIS

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 157PIC24F16KA102 FAMILYREGISTER 19-6: WKDYHR: WEEKDAY AND HOURS VALUE REGISTER(1)U-0 U-0 U-

PIC24F16KA102 FAMILYDS39927B-page 14 Preliminary © 2009 Microchip Technology Inc.T1CK 10 7 12 9 I ST Timer1 ClockT2CK 18 15 26 23 I ST Timer2 ClockT3C

PIC24F16KA102 FAMILYDS39927B-page 158 Preliminary © 2009 Microchip Technology Inc.19.2.6 ALRMVAL REGISTER MAPPINGSREGISTER 19-8: ALMTHDY: ALARM MONTH

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 159PIC24F16KA102 FAMILYREGISTER 19-10: ALMINSEC: ALARM MINUTES AND SECONDS VALUE REGISTERU-

PIC24F16KA102 FAMILYDS39927B-page 160 Preliminary © 2009 Microchip Technology Inc.19.3 CalibrationThe real-time crystal input can be calibrated using

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 161PIC24F16KA102 FAMILYFIGURE 19-2: ALARM MASK SETTINGSNote 1: Annually, except when config

PIC24F16KA102 FAMILYDS39927B-page 162 Preliminary © 2009 Microchip Technology Inc.NOTES:

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 163PIC24F16KA102 FAMILY20.0 PROGRAMMABLE CYCLIC REDUNDANCY CHECK (CRC) GENERATORThe program

PIC24F16KA102 FAMILYDS39927B-page 164 Preliminary © 2009 Microchip Technology Inc.FIGURE 20-2: CRC GENERATOR RECONFIGURED FOR x16 + x12 + x5 + 1 2

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 165PIC24F16KA102 FAMILY20.3 RegistersThere are four registers used to control programmableC

PIC24F16KA102 FAMILYDS39927B-page 166 Preliminary © 2009 Microchip Technology Inc.REGISTER 20-2: CRCXOR: CRC XOR POLYNOMIAL REGISTERR/W-0 R/W-0 R/W-0

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 167PIC24F16KA102 FAMILY21.0 HIGH/LOW-VOLTAGE DETECT (HLVD)The High/Low-Voltage Detect modul

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 15PIC24F16KA102 FAMILY2.0 GUIDELINES FOR GETTING STARTED WITH 16-BIT MICROCONTROLLERS2.1 Ba

PIC24F16KA102 FAMILYDS39927B-page 168 Preliminary © 2009 Microchip Technology Inc.REGISTER 21-1: HLVDCON: HIGH/LOW-VOLTAGE DETECT CONTROL REGISTER R/

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 169PIC24F16KA102 FAMILY22.0 10-BIT HIGH-SPEED A/D CONVERTERThe 10-bit A/D Converter has the

PIC24F16KA102 FAMILYDS39927B-page 170 Preliminary © 2009 Microchip Technology Inc.FIGURE 22-1: 10-BIT HIGH-SPEED A/D CONVERTER BLOCK DIAGRAMComparator

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 171PIC24F16KA102 FAMILYREGISTER 22-1: AD1CON1: A/D CONTROL REGISTER 1 R/W-0 U-0 R/W-0 U-0

PIC24F16KA102 FAMILYDS39927B-page 172 Preliminary © 2009 Microchip Technology Inc.REGISTER 22-2: AD1CON2: A/D CONTROL REGISTER 2 R/W-0 R/W-0 R/W-0 R/

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 173PIC24F16KA102 FAMILYREGISTER 22-3: AD1CON3: A/D CONTROL REGISTER 3 R/W-0 U-0 U-0 R/W-0

PIC24F16KA102 FAMILYDS39927B-page 174 Preliminary © 2009 Microchip Technology Inc.-REGISTER 22-4: AD1CHS: A/D INPUT SELECT REGISTER R/W-0 U-0 U-0 U-0

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 175PIC24F16KA102 FAMILYREGISTER 22-5: AD1PCFG: A/D PORT CONFIGURATION REGISTERU-0 U-0 U-0 R

PIC24F16KA102 FAMILYDS39927B-page 176 Preliminary © 2009 Microchip Technology Inc.EQUATION 22-1: A/D CONVERSION CLOCK PERIOD(1)FIGURE 22-2: 10-BIT A/D

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 177PIC24F16KA102 FAMILYFIGURE 22-3: A/D TRANSFER FUNCTION10 0000 0001 (513)10 0000 0010 (51

PIC24F16KA102 FAMILYDS39927B-page 16 Preliminary © 2009 Microchip Technology Inc.2.2 Power Supply Pins2.2.1 DECOUPLING CAPACITORSThe use of decoupling

PIC24F16KA102 FAMILYDS39927B-page 178 Preliminary © 2009 Microchip Technology Inc.NOTES:

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 179PIC24F16KA102 FAMILY23.0 COMPARATOR MODULEThe comparator module provides two dual inputc

PIC24F16KA102 FAMILYDS39927B-page 180 Preliminary © 2009 Microchip Technology Inc.FIGURE 23-2: INDIVIDUAL COMPARATOR CONFIGURATIONSCxVIN-VIN+Off (Read

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 181PIC24F16KA102 FAMILY REGISTER 23-1: CMxCON: COMPARATOR x CONTROL REGISTERSR/W-0 R/W-0 R

PIC24F16KA102 FAMILYDS39927B-page 182 Preliminary © 2009 Microchip Technology Inc.REGISTER 23-2: CMSTAT: COMPARATOR MODULE STATUS REGISTERR/W-0 U-0 U-

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 183PIC24F16KA102 FAMILY24.0 COMPARATOR VOLTAGE REFERENCE24.1 Configuring the Comparator Vol

PIC24F16KA102 FAMILYDS39927B-page 184 Preliminary © 2009 Microchip Technology Inc.REGISTER 24-1: CVRCON: COMPARATOR VOLTAGE REFERENCE CONTROL REGISTER

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 185PIC24F16KA102 FAMILY25.0 CHARGE TIME MEASUREMENT UNIT (CTMU)The Charge Time Measurement

PIC24F16KA102 FAMILYDS39927B-page 186 Preliminary © 2009 Microchip Technology Inc.25.2 Measuring TimeTime measurements on the pulse width can be simil

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 187PIC24F16KA102 FAMILY REGISTER 25-1: CTMUCON: CTMU CONTROL REGISTERR/W-0 U-0 R/W-0 R/W-0

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 17PIC24F16KA102 FAMILY2.4 Voltage Regulator Pins (ENVREG/DISVREG and VCAP/VDDCORE)The on-ch

PIC24F16KA102 FAMILYDS39927B-page 188 Preliminary © 2009 Microchip Technology Inc. bit 3-2 EDG1SEL<1:0>: Edge 1 Source Select bits11 = CTED1 pi

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 189PIC24F16KA102 FAMILY26.0 SPECIAL FEATURESPIC24F16KA102 family devices include severalfea

PIC24F16KA102 FAMILYDS39927B-page 190 Preliminary © 2009 Microchip Technology Inc.REGISTER 26-2: FGS: GENERAL SEGMENT CONFIGURATION REGISTERREGISTER 2

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 191PIC24F16KA102 FAMILYREGISTER 26-4: FOSC: OSCILLATOR CONFIGURATION REGISTERR/P-1 R/P-1 R/

PIC24F16KA102 FAMILYDS39927B-page 192 Preliminary © 2009 Microchip Technology Inc.REGISTER 26-5: FWDT: WATCHDOG TIMER CONFIGURATION REGISTERR/P-1 R/P-

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 193PIC24F16KA102 FAMILYREGISTER 26-6: FPOR: RESET CONFIGURATION REGISTERREGISTER 26-7: FICD

PIC24F16KA102 FAMILYDS39927B-page 194 Preliminary © 2009 Microchip Technology Inc.REGISTER 26-8: FDS: DEEP SLEEP CONFIGURATION REGISTERR/P-1 R/P-1 R/P

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 195PIC24F16KA102 FAMILYREGISTER 26-9: DEVID: DEVICE ID REGISTER U-0 U-0 U-0 U-0 U-0 U-0 U

PIC24F16KA102 FAMILYDS39927B-page 196 Preliminary © 2009 Microchip Technology Inc.26.2 Watchdog Timer (WDT)For the PIC24F16KA102 family of devices, th

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 197PIC24F16KA102 FAMILY26.3 Deep Sleep Watchdog Timer (DSWDT)In PIC24F16KA102 family device

DS39927B-page ii Preliminary © 2009 Microchip Technology Inc.Information contained in this publication regarding deviceapplications and the like is pr

PIC24F16KA102 FAMILYDS39927B-page 18 Preliminary © 2009 Microchip Technology Inc.2.6 External Oscillator PinsMany microcontrollers have options for at

PIC24F16KA102 FAMILYDS39927B-page 198 Preliminary © 2009 Microchip Technology Inc.NOTES:

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 199PIC24F16KA102 FAMILY27.0 DEVELOPMENT SUPPORTThe PIC® microcontrollers are supported with

PIC24F16KA102 FAMILYDS39927B-page 200 Preliminary © 2009 Microchip Technology Inc.27.2 MPASM AssemblerThe MPASM Assembler is a full-featured, universa

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 201PIC24F16KA102 FAMILY27.7 MPLAB ICE 2000 High-Performance In-Circuit EmulatorThe MPLAB IC

PIC24F16KA102 FAMILYDS39927B-page 202 Preliminary © 2009 Microchip Technology Inc.27.11 PICSTART Plus Development ProgrammerThe PICSTART Plus Developm

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 203PIC24F16KA102 FAMILY28.0 INSTRUCTION SET SUMMARYThe PIC24F instruction set adds many enh

PIC24F16KA102 FAMILYDS39927B-page 204 Preliminary © 2009 Microchip Technology Inc.TABLE 28-1: SYMBOLS USED IN OPCODE DESCRIPTIONS Field Description#t

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 205PIC24F16KA102 FAMILYTABLE 28-2: INSTRUCTION SET OVERVIEW AssemblyMnemonicAssembly Syn

PIC24F16KA102 FAMILYDS39927B-page 206 Preliminary © 2009 Microchip Technology Inc.BTSS BTSS f,#bit4 Bit Test f, Skip if Set 1 1 (2 or 3)NoneBTSS Ws,#b

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 207PIC24F16KA102 FAMILYGOTO GOTO Expr Go to Address 2 2 NoneGOTO Wn Go to Indirect 1 2 None

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 19PIC24F16KA102 FAMILY3.0 CPU The PIC24F CPU has a 16-bit (data) modified Harvardarchitectu

PIC24F16KA102 FAMILYDS39927B-page 208 Preliminary © 2009 Microchip Technology Inc.PWRSAV PWRSAV #lit1 Go into Sleep or Idle mode 1 1 WDTO, SleepR

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 209PIC24F16KA102 FAMILYTBLRDL TBLRDL Ws,Wd Read Prog<15:0> to Wd 1 2 NoneTBLWTH TBLWT

PIC24F16KA102 FAMILYDS39927B-page 210 Preliminary © 2009 Microchip Technology Inc.NOTES:

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 211PIC24F16KA102 FAMILY29.0 ELECTRICAL CHARACTERISTICSThis section provides an overview of

PIC24F16KA102 FAMILYDS39927B-page 212 Preliminary © 2009 Microchip Technology Inc.29.1 DC Characteristics FIGURE 29-1: PIC24F16KA102 FAMILY VOLTAGE-FR

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 213PIC24F16KA102 FAMILYTABLE 29-4: HIGH/LOW–VOLTAGE DETECT CHARACTERISTICS TABLE 29-3: DC C

PIC24F16KA102 FAMILYDS39927B-page 214 Preliminary © 2009 Microchip Technology Inc.TABLE 29-5: BOR TRIP POINTSStandard Operating Conditions (unless oth

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 215PIC24F16KA102 FAMILYDC31828μA-40°C1.8VLPRC (31 kHz)DC31a 28 +25°CDC31b 28 +60°CDC31c 28

PIC24F16KA102 FAMILYDS39927B-page 216 Preliminary © 2009 Microchip Technology Inc.TABLE 29-7: DC CHARACTERISTICS: IDLE CURRENT (IIDLE) DC CHARACTERIST

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 217PIC24F16KA102 FAMILYTABLE 29-8: DC CHARACTERISTICS: POWER-DOWN CURRENT (IPD) DC CHARACTE

PIC24F16KA102 FAMILYDS39927B-page 20 Preliminary © 2009 Microchip Technology Inc.FIGURE 3-1: PIC24F CPU CORE BLOCK DIAGRAMTABLE 3-1: CPU CORE REGISTER

PIC24F16KA102 FAMILYDS39927B-page 218 Preliminary © 2009 Microchip Technology Inc.DC620.4500.650μA-40°C1.8VTimer1 w/32 kHz Crystal: T132 (SOSC – LP)(3

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 219PIC24F16KA102 FAMILYDC700.0450.200μA-40°C1.8VLPBOR(3,4)DC70a 0.200 +25°CDC70b 0.200 +60°

PIC24F16KA102 FAMILYDS39927B-page 220 Preliminary © 2009 Microchip Technology Inc.TABLE 29-9: DC CHARACTERISTICS: I/O PIN INPUT SPECIFICATIONSDC CHARA

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 221PIC24F16KA102 FAMILYTABLE 29-10: DC CHARACTERISTICS: I/O PIN OUTPUT SPECIFICATIONS DC C

PIC24F16KA102 FAMILYDS39927B-page 222 Preliminary © 2009 Microchip Technology Inc.TABLE 29-13: COMPARATOR DC SPECIFICATIONSTABLE 29-14: COMPARATOR VOL

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 223PIC24F16KA102 FAMILY29.2 AC Characteristics and Timing Parameters The information contai

PIC24F16KA102 FAMILYDS39927B-page 224 Preliminary © 2009 Microchip Technology Inc.FIGURE 29-3: EXTERNAL CLOCK TIMING OSCICLKOQ4 Q1 Q2 Q3 Q4Q1OS20OS

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 225PIC24F16KA102 FAMILYTABLE 29-18: PLL CLOCK TIMING SPECIFICATIONS (VDD = 1.8V TO 3.6V) A

PIC24F16KA102 FAMILYDS39927B-page 226 Preliminary © 2009 Microchip Technology Inc.FIGURE 29-4: CLKO AND I/O TIMING CHARACTERISTICS Note: Refer to Fi

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 227PIC24F16KA102 FAMILYTABLE 29-22: COMPARATOR TIMINGSTABLE 29-23: COMPARATOR VOLTAGE REFER

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 21PIC24F16KA102 FAMILYFIGURE 3-2: PROGRAMMER’S MODELNOVZ CTBLPAG22 07 0 015Program Co

PIC24F16KA102 FAMILYDS39927B-page 228 Preliminary © 2009 Microchip Technology Inc.TABLE 29-25: ADC MODULE SPECIFICATIONSAC CHARACTERISTICSStandard Ope

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 229PIC24F16KA102 FAMILYTABLE 29-26: ADC CONVERSION TIMING REQUIREMENTS(1) AC CHARACTERISTIC

PIC24F16KA102 FAMILYDS39927B-page 230 Preliminary © 2009 Microchip Technology Inc.TABLE 29-27: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 231PIC24F16KA102 FAMILY30.0 PACKAGING INFORMATION30.1 Package Marking Information 28-Lead

PIC24F16KA102 FAMILYDS39927B-page 232 Preliminary © 2009 Microchip Technology Inc.28-Lead QFNXXXXXXXXXXXXXXXXYYWWNNNExample24F16KA102-I/ML09100173e28-

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 233PIC24F16KA102 FAMILY30.2 Package DetailsThe following sections give the technical detail

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© 2009 Microchip Technology Inc. Preliminary DS39927B-page 235PIC24F16KA102 FAMILY!#$"!%!!&'

PIC24F16KA102 FAMILYDS39927B-page 236 Preliminary © 2009 Microchip Technology Inc. !#$"!%!!&'

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 237PIC24F16KA102 FAMILY!%!% ()*'&!%

PIC24F16KA102 FAMILYDS39927B-page 22 Preliminary © 2009 Microchip Technology Inc.3.2 CPU Control RegistersREGISTER 3-1: SR: ALU STATUS REGISTERU-0 U-0

PIC24F16KA102 FAMILYDS39927B-page 238 Preliminary © 2009 Microchip Technology Inc. !%!%()*'&!%

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 239PIC24F16KA102 FAMILY20-Lead Plastic Quad Flat, No Lead Package (MQ) – 5x5x0.9 mm Body [Q

PIC24F16KA102 FAMILYDS39927B-page 240 Preliminary © 2009 Microchip Technology Inc.  ,-)"./010

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 241PIC24F16KA102 FAMILY ,-)"./010

PIC24F16KA102 FAMILYDS39927B-page 242 Preliminary © 2009 Microchip Technology Inc.NOTES:

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 243PIC24F16KA102 FAMILYAPPENDIX A: REVISION HISTORYRevision A (November 2008)Original data

PIC24F16KA102 FAMILYDS39927B-page 244 Preliminary © 2009 Microchip Technology Inc.NOTES:

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 245PIC24F16KA102 FAMILYINDEXAA/D10-Bit High-Speed A/D Converter ...

PIC24F16KA102 FAMILYDS39927B-page 246 Preliminary © 2009 Microchip Technology Inc.DData EEPROMErasing ...

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 247PIC24F16KA102 FAMILYPPackagingDetails ...

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 23PIC24F16KA102 FAMILY3.3 Arithmetic Logic Unit (ALU)The PIC24F ALU is 16 bits wide and is

PIC24F16KA102 FAMILYDS39927B-page 248 Preliminary © 2009 Microchip Technology Inc.T2CON (Timer2 Control) ... 11

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 249PIC24F16KA102 FAMILYTHE MICROCHIP WEB SITEMicrochip provides online support via our WWW

PIC24F16KA102 FAMILYDS39927B-page 250 Preliminary © 2009 Microchip Technology Inc.READER RESPONSEIt is our intention to provide you with the best docu

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 251PIC24F16KA102 FAMILYPRODUCT IDENTIFICATION SYSTEMTo order or obtain information, e.g., o

DS39927B-page 252 Preliminary © 2009 Microchip Technology Inc.AMERICASCorporate Office2355 West Chandler Blvd.Chandler, AZ 85224-6199Tel: 480-792-72

PIC24F16KA102 FAMILYDS39927B-page 24 Preliminary © 2009 Microchip Technology Inc.3.3.2 DIVIDERThe divide block supports 32-bit/16-bit and 16-bit/16-bi

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 25PIC24F16KA102 FAMILY4.0 MEMORY ORGANIZATIONAs with Harvard architecture devices, the PIC2

PIC24F16KA102 FAMILYDS39927B-page 26 Preliminary © 2009 Microchip Technology Inc.4.1.1 PROGRAM MEMORY ORGANIZATIONThe program memory space is organize

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 27PIC24F16KA102 FAMILY4.2 Data Address SpaceThe PIC24F core has a separate, 16-bit wide dat

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 1PIC24F16KA102 FAMILYPower Management Modes:• Run – CPU, Flash, SRAM and Peripherals On• Do

PIC24F16KA102 FAMILYDS39927B-page 28 Preliminary © 2009 Microchip Technology Inc.4.2.2 DATA MEMORY ORGANIZATION AND ALIGNMENTTo maintain backward comp

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 29PIC24F16KA102 FAMILY TABLE 4-3: CPU CORE REGISTERS MAPFile NameAddrBit 15Bit 14Bit 13Bit

PIC24F16KA102 FAMILYDS39927B-page 30 Preliminary © 2009 Microchip Technology Inc. TABLE 4-4: ICN REGISTER MAP File NameAddr Bit 15 Bit 14 Bit 13 Bit 1

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 31PIC24F16KA102 FAMILY TABLE 4-6: TIMER REGISTER MAPFile Name Addr Bit 15 Bit 14 Bit 13 B

PIC24F16KA102 FAMILYDS39927B-page 32 Preliminary © 2009 Microchip Technology Inc. TABLE 4-9: I2C™ REGISTER MAPFile Name Addr Bit 15 Bit 14 Bit 13 Bi

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 33PIC24F16KA102 FAMILYTABLE 4-12: PORTA REGISTER MAPFile NameAddr Bit 15 Bit 14 Bit 13 Bit

PIC24F16KA102 FAMILYDS39927B-page 34 Preliminary © 2009 Microchip Technology Inc. TABLE 4-15: ADC REGISTER MAPFile NameAddr Bit 15 Bit 14 Bit 13 Bit 1

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 35PIC24F16KA102 FAMILY TABLE 4-17: REAL-TIME CLOCK AND CALENDAR REGISTER MAPFile NameAddr

PIC24F16KA102 FAMILYDS39927B-page 36 Preliminary © 2009 Microchip Technology Inc.TABLE 4-20: CLOCK CONTROL REGISTER MAPFile Name Addr Bit 15 Bit 14 Bi

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 37PIC24F16KA102 FAMILY4.2.5 SOFTWARE STACKIn addition to its use as a working register, the

PIC24F16KA102 FAMILYDS39927B-page 2 Preliminary © 2009 Microchip Technology Inc.Pin DiagramsPIC24XXKAX01123456789102019181716151413121120-Pin PDIP, SS

PIC24F16KA102 FAMILYDS39927B-page 38 Preliminary © 2009 Microchip Technology Inc.TABLE 4-24: PROGRAM SPACE ADDRESS CONSTRUCTIONFIGURE 4-5: DATA ACCESS

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 39PIC24F16KA102 FAMILY4.3.2 DATA ACCESS FROM PROGRAM MEMORY AND DATA EEPROM MEMORY USING TA

PIC24F16KA102 FAMILYDS39927B-page 40 Preliminary © 2009 Microchip Technology Inc.FIGURE 4-6: ACCESSING PROGRAM MEMORY WITH TABLE INSTRUCTIONS4.3.3 REA

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 41PIC24F16KA102 FAMILYAny other iteration of the REPEAT loop will allow theinstruction acce

PIC24F16KA102 FAMILYDS39927B-page 42 Preliminary © 2009 Microchip Technology Inc.NOTES:

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 43PIC24F16KA102 FAMILY5.0 FLASH PROGRAM MEMORYThe PIC24F16KA102 family of devices containsi

PIC24F16KA102 FAMILYDS39927B-page 44 Preliminary © 2009 Microchip Technology Inc.5.2 RTSP OperationThe PIC24F Flash program memory array is organizedi

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 45PIC24F16KA102 FAMILYREGISTER 5-1: NVMCON: FLASH MEMORY CONTROL REGISTERR/SO-0, HC R/W-0 R

PIC24F16KA102 FAMILYDS39927B-page 46 Preliminary © 2009 Microchip Technology Inc.5.5.1 PROGRAMMING ALGORITHM FOR FLASH PROGRAM MEMORYThe user can prog

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 47PIC24F16KA102 FAMILYEXAMPLE 5-2: ERASING A PROGRAM MEMORY ROW – ‘C’ LANGUAGE CODE // C ex

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 3PIC24F16KA102 FAMILYPin Diagrams (Continued) 89231121314151061116171819207PIC24FXXKA10254M

PIC24F16KA102 FAMILYDS39927B-page 48 Preliminary © 2009 Microchip Technology Inc.EXAMPLE 5-3: LOADING THE WRITE BUFFERS – ASSEMBLY LANGUAGE CODE EXAMP

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 49PIC24F16KA102 FAMILYEXAMPLE 5-5: INITIATING A PROGRAMMING SEQUENCE – ASSEMBLY LANGUAGE CO

PIC24F16KA102 FAMILYDS39927B-page 50 Preliminary © 2009 Microchip Technology Inc.NOTES:

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 51PIC24F16KA102 FAMILY6.0 DATA EEPROM MEMORYThe data EEPROM memory is a Nonvolatile Memory(

PIC24F16KA102 FAMILYDS39927B-page 52 Preliminary © 2009 Microchip Technology Inc. REGISTER 6-1: NVMCON: NONVOLATILE MEMORY CONTROL REGISTERR/S-0, HC R

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 53PIC24F16KA102 FAMILY6.3 NVM Address RegisterAs with Flash program memory, the NVM Address

PIC24F16KA102 FAMILYDS39927B-page 54 Preliminary © 2009 Microchip Technology Inc.6.4.1 ERASE DATA EEPROMThe data EEPROM can be fully erased, or can be

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 55PIC24F16KA102 FAMILY6.4.1.1 Data EEPROM Bulk EraseTo erase the entire data EEPROM (bulk e

PIC24F16KA102 FAMILYDS39927B-page 56 Preliminary © 2009 Microchip Technology Inc.6.4.3 READING THE DATA EEPROMTo read a word from data EEPROM, the tab

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 57PIC24F16KA102 FAMILY7.0 RESETSThe Reset module combines all Reset sources andcontrols the

PIC24F16KA102 FAMILYDS39927B-page 4 Preliminary © 2009 Microchip Technology Inc.Pin Diagrams (Continued)Note 1: Alternative multiplexing for SDA1 and

PIC24F16KA102 FAMILYDS39927B-page 58 Preliminary © 2009 Microchip Technology Inc.REGISTER 7-1: RCON: RESET CONTROL REGISTER(1)R/W-0, HS R/W-0, HS R/W-

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 59PIC24F16KA102 FAMILYTABLE 7-1: RESET FLAG BIT OPERATION7.1 Clock Source Selection at Rese

PIC24F16KA102 FAMILYDS39927B-page 60 Preliminary © 2009 Microchip Technology Inc.7.2 Device Reset TimesThe Reset times for various types of device Res

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 61PIC24F16KA102 FAMILY7.2.1 POR AND LONG OSCILLATOR START-UP TIMESThe oscillator start-up c

PIC24F16KA102 FAMILYDS39927B-page 62 Preliminary © 2009 Microchip Technology Inc.7.5.2 DETECTING BORWhen BOR is enabled, the BOR bit (RCON<1>) i

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 63PIC24F16KA102 FAMILY8.0 INTERRUPT CONTROLLERThe PIC24F interrupt controller reduces the n

PIC24F16KA102 FAMILYDS39927B-page 64 Preliminary © 2009 Microchip Technology Inc.FIGURE 8-1: PIC24F INTERRUPT VECTOR TABLEReset – GOTO Instruction 000

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 65PIC24F16KA102 FAMILYTABLE 8-2: IMPLEMENTED INTERRUPT VECTORSTABLE 8-1: TRAP VECTOR DETAIL

PIC24F16KA102 FAMILYDS39927B-page 66 Preliminary © 2009 Microchip Technology Inc.8.3 Interrupt Control and Status RegistersThe PIC24F16KA102 family of

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 67PIC24F16KA102 FAMILYREGISTER 8-1: SR: ALU STATUS REGISTERU-0 U-0 U-0 U-0 U-0 U-0 U-0 R-0,

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 5PIC24F16KA102 FAMILYTable of Contents1.0 Device Overview ...

PIC24F16KA102 FAMILYDS39927B-page 68 Preliminary © 2009 Microchip Technology Inc.REGISTER 8-2: CORCON: CPU CONTROL REGISTERU-0 U-0 U-0 U-0 U-0 U-0 U-0

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 69PIC24F16KA102 FAMILYREGISTER 8-3: INTCON1: INTERRUPT CONTROL REGISTER 1R/W-0 U-0 U-0 U-0

PIC24F16KA102 FAMILYDS39927B-page 70 Preliminary © 2009 Microchip Technology Inc.REGISTER 8-4: INTCON2: INTERRUPT CONTROL REGISTER2R/W-0 R-0, HSC U-0

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 71PIC24F16KA102 FAMILYREGISTER 8-5: IFS0: INTERRUPT FLAG STATUS REGISTER 0R/W-0, HS U-0 R/W

PIC24F16KA102 FAMILYDS39927B-page 72 Preliminary © 2009 Microchip Technology Inc.REGISTER 8-6: IFS1: INTERRUPT FLAG STATUS REGISTER 1R/W-0, HS R/W-0,

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 73PIC24F16KA102 FAMILYREGISTER 8-7: IFS3: INTERRUPT FLAG STATUS REGISTER 3U-0 R/W-0, HS U-0

PIC24F16KA102 FAMILYDS39927B-page 74 Preliminary © 2009 Microchip Technology Inc.REGISTER 8-8: IFS4: INTERRUPT FLAG STATUS REGISTER 4U-0 U-0 R/W-0, HS

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 75PIC24F16KA102 FAMILYREGISTER 8-9: IEC0: INTERRUPT ENABLE CONTROL REGISTER 0R/W-0 U-0 R/W-

PIC24F16KA102 FAMILYDS39927B-page 76 Preliminary © 2009 Microchip Technology Inc.REGISTER 8-10: IEC1: INTERRUPT ENABLE CONTROL REGISTER 1R/W-0 R/W-0 R

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 77PIC24F16KA102 FAMILYREGISTER 8-11: IEC3: INTERRUPT ENABLE CONTROL REGISTER 3 U-0 R/W-0 U-

PIC24F16KA102 FAMILYDS39927B-page 6 Preliminary © 2009 Microchip Technology Inc.TO OUR VALUED CUSTOMERSIt is our intention to provide our valued custo

PIC24F16KA102 FAMILYDS39927B-page 78 Preliminary © 2009 Microchip Technology Inc.REGISTER 8-12: IEC4: INTERRUPT ENABLE CONTROL REGISTER 4U-0 U-0 R/W-0

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 79PIC24F16KA102 FAMILYREGISTER 8-13: IPC0: INTERRUPT PRIORITY CONTROL REGISTER 0U-0 R/W-1 R

PIC24F16KA102 FAMILYDS39927B-page 80 Preliminary © 2009 Microchip Technology Inc.REGISTER 8-14: IPC1: INTERRUPT PRIORITY CONTROL REGISTER 1 U-0 R/W-1

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 81PIC24F16KA102 FAMILYREGISTER 8-15: IPC2: INTERRUPT PRIORITY CONTROL REGISTER 2U-0 R/W-1 R

PIC24F16KA102 FAMILYDS39927B-page 82 Preliminary © 2009 Microchip Technology Inc.REGISTER 8-16: IPC3: INTERRUPT PRIORITY CONTROL REGISTER 3U-0 R/W-1 R

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 83PIC24F16KA102 FAMILYREGISTER 8-17: IPC4: INTERRUPT PRIORITY CONTROL REGISTER 4 U-0 R/W-1

PIC24F16KA102 FAMILYDS39927B-page 84 Preliminary © 2009 Microchip Technology Inc.REGISTER 8-18: IPC5: INTERRUPT PRIORITY CONTROL REGISTER 5 U-0 U-0 U-

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 85PIC24F16KA102 FAMILYREGISTER 8-19: IPC7: INTERRUPT PRIORITY CONTROL REGISTER 7U-0 R/W-1 R

PIC24F16KA102 FAMILYDS39927B-page 86 Preliminary © 2009 Microchip Technology Inc.REGISTER 8-20: IPC15: INTERRUPT PRIORITY CONTROL REGISTER 15U-0 U-0 U

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 87PIC24F16KA102 FAMILYREGISTER 8-21: IPC16: INTERRUPT PRIORITY CONTROL REGISTER 16U-0 R/W-1

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 7PIC24F16KA102 FAMILY1.0 DEVICE OVERVIEWThis document contains device-specific information

PIC24F16KA102 FAMILYDS39927B-page 88 Preliminary © 2009 Microchip Technology Inc.REGISTER 8-22: IPC18: INTERRUPT PRIORITY CONTROL REGISTER 18U-0 U-0 U

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 89PIC24F16KA102 FAMILYREGISTER 8-24: INTTREG: INTERRUPT CONTROL AND STATUS REGISTERR-0 U-0

PIC24F16KA102 FAMILYDS39927B-page 90 Preliminary © 2009 Microchip Technology Inc.8.4 Interrupt Setup Procedures8.4.1 INITIALIZATIONTo configure an int

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 91PIC24F16KA102 FAMILY9.0 OSCILLATOR CONFIGURATIONThe oscillator system for the PIC24F16KA1

PIC24F16KA102 FAMILYDS39927B-page 92 Preliminary © 2009 Microchip Technology Inc.9.1 CPU Clocking SchemeThe system clock source can be provided by one

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 93PIC24F16KA102 FAMILY9.3 Control RegistersThe operation of the oscillator is controlled by

PIC24F16KA102 FAMILYDS39927B-page 94 Preliminary © 2009 Microchip Technology Inc.bit 7 CLKLOCK: Clock Selection Lock Enabled bitIf FSCM is enabled (FC

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 95PIC24F16KA102 FAMILYREGISTER 9-2: CLKDIV: CLOCK DIVIDER REGISTER R/W-0 R/W-0 R/W-1 R/W-1

PIC24F16KA102 FAMILYDS39927B-page 96 Preliminary © 2009 Microchip Technology Inc.REGISTER 9-3: OSCTUN: FRC OSCILLATOR TUNE REGISTER U-0 U-0 U-0 U-0 U-

© 2009 Microchip Technology Inc. Preliminary DS39927B-page 97PIC24F16KA102 FAMILY9.4 Clock Switching OperationWith few limitations, applications are f