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PIC24F16KA102 FAMILY
DS39927B-page 190 Preliminary © 2009 Microchip Technology Inc.
REGISTER 26-2: FGS: GENERAL SEGMENT CONFIGURATION REGISTER
REGISTER 26-3: FOSCSEL: OSCILLATOR SELECTION CONFIGURATION REGISTER
U-0 U-0 U-0 U-0 U-0 U-0 R/C-1 R/C-1
GSS0 GWRP
bit 7 bit 0
Legend:
R = Readable bit C = Clearable bit U = Unimplemented bit, read as ‘0
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-2 Unimplemented: Read as ‘0
bit 1 GSS0: General Segment Code Flash Code Protection bit
1 = No protection
0 = Standard security enabled
bit 0 GWRP: General Segment Code Flash Write Protection bit
1 = General segment may be written
0 = General segment is write-protected
R/P-1 U-0 U-0 U-0 U-0 R/P-1 R/P-1 R/P-1
IESO
FNOSC2 FNOSC1 FNOSC0
bit 7 bit 0
Legend:
R = Readable bit P = Programmable bit U = Unimplemented bit, read as ‘0
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7 IESO: Internal External Switchover bit
1 = Internal External Switchover mode enabled (Two-Speed Start-up enabled)
0 = Internal External Switchover mode disabled (Two-Speed Start-up disabled)
bit 6-3 Unimplemented: Read as ‘0
bit 2-0 FNOSC<2:0>: Oscillator Selection bits
000 = Fast RC oscillator (FRC)
001 = Fast RC oscillator with divide-by-N with PLL module (FRCDIV+PLL)
010 = Primary oscillator (XT, HS, EC)
011 = Primary oscillator with PLL module (HS+PLL, EC+PLL)
100 = Secondary oscillator (SOSC)
101 = Low-Power RC oscillator (LPRC)
110 = 500 kHz Low-Power FRC oscillator with divide-by-N (LPFRCDIV)
111 = 8 MHz FRC oscillator with divide-by-N (FRCDIV)
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